The emphasis of the first such method is on the design, and of the other method, the emphasis is on the manufacturing process. Pdf overview of fanout wafer level package fowlp and fan. In this paper, the reliability improvements are discussed through various existing and tested wlp technologies at silicon level and ball level, respectively. Fanout waferlevel packaging for 3d ic heterogeneous. Fanout wafer level packaging also known as wafer level fanout packaging, fanout wlp, fowl packaging, fowlp, fowlp, etc. Fanin package types known as waferlevel chipscale packages. Advanced fan out wafer level package development for small form factor and. Technological core of fowlp is the formation of a reconfigured molded wafer combined with a thin film redistribution layer to yield an smdcompatible package. Two 3d ic heterogeneous integrations by fanout wafer level packaging fowlp technology are investigated in this study. Amkor is licensed for fanout wlp technology ewlb embedded wafer level ball grid array and is one of the technology drivers in this new packaging. Fanout wafer level packaging patent landscape analysis november 2016 with apple and tsmc changing the game, 2016 is a turning point for the fanout market. Fanout waferlevel packaging is an integrated circuit packaging technology, and an enhancement of standard waferlevel packaging wlp solutions. The fanout waferlevel package fowlp is an enhancement of standard. It allows system integration at the wafer level with the highest integration density.
Fanout wafer level packaging fowlp is one of the latest packaging trends in microelectronics. Fowlp has a high potential for significant package miniaturization concerning package volume but also its thickness. Fanout waferlevel packaging fowlp has been described as a game changer by industry experts because of its thin form factor, low cost of. White paper on panel level packaging consortium pdf 1,52 mb. Wlcsp had previously been the preferred technology for smartphones figure 1, as the. Fanout wafer level packaging patent landscape analysis november 2016. Pdf silicon wafer integrated fanout technology semantic scholar. Pdf ic packaging technology has been evolving fast and diversely in the past decade, from highend to lowend application, such as 3d ic. Addresses fanout waferlevel packaging fowlp, in theory and particularly in. An10439 waferlevel chipscale package fanin wlp and fanout. The number of enforceable patents is increasing worldwide, with several companies already standing out by virtue of their strong ip position. Waferlevel chipscale package fanin wlp and fanout wlp.